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NJU26107
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General Description
Digital Signal Processor for TV Package
The NJU26107 is a high performance 24-bit digital signal processor. The NJU26107 provides `eala' 3D Surround function, `eala BASS' Dynamic Bass Boost function, SRS 3D, TruBass, AGC, Tone Control, and LPF/HPF. These kinds of sound functions are suitable for TV, mini-component, CD radio-cassette, speakers system and other audio products.
FEATURES
- Software * 3D sound : eala(NJRC Original Surround), SRS 3D * Sound Enhancement: : ealaBASS (NJRC Original Dynamic Bass Boost), SRS TruBass * AGC * Tone Control * Master Volume / Balance control * LPF/HPF crossover network * WatchDog Clock Output
NJU26107FR1
- Hardware * 24bit Fixed-point Digital Signal Processing * Maximum System Clock Frequency : 38MHz Max. * Digital Audio Interface : 2 Input ports / 3 Output ports * Digital Audio Format : I2S 24bit, Left- justified, Right-justified, BCK : 32/64fs * Master / Slave Mode : Master Mode MCK 1/2 fclk, 1/3 fclk ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs * Power Supply : 2.5V * Input terminal : 3.3V Input tolerant * Package : QFP32-R1 (Pb-Free) * Two kinds of micro computer interface : I2C bus (standard-mode/100kbps) : Serial interface (4 lines: clock, enable, input data, output data)
The detail hardware specification is described in the " NJU26100 Series Hardware Data Sheet".
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NJU26107
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Function Block Diagram
AD1/SDIN AD2/SSb
NJU26107
DSP ARITHMETIC UNIT SERIAL AUDIO INTERFACE BCK0 PROGRAM CONTROL L/R " * * 24-BIT x 24-BIT MULTIPLIER L/R " * * L/R " * * L/R in LR0 SDO0 SDO1 SDO2 SDI0 SDI1 BCKI LRI WDC
SCL/SCK
SERIAL HOST INTERFACE
SDA/SDOUT
RESETb MCK XI XO TIMING GENERATOR
ALU
L/R in ADDRESS GENERATION UNIT
DATA RAM
FIRMWARE ROM
GPIO AND CONFIGURATION INTERFACE
SEL1
Fig. 1 NJU26107 Block Diagram
DSP Block Diagram
SDI0 SDI1
eala AGC SRS 3D TruBass
ealaBASS
BBE
Tone Control
Master Volume/ Balance
ealaBASS
LPF
SDO0
HPF
*Either "ealaBass" is selected.
SDO1
SDO2
Fig. 2 NJU26107Function Diagram
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NJU26107
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VDDR VDDR VDDC
18
24
23
22
21
20
19
SDI0 SDI1 TEST LRI BCKI MCK BCKO LRO
25
17
VDDC
VSSR
VSSR
VSSC
VSSC
Pin Configuration
16 26 15 27 14 28
WDC VSSC VDDC RESETb VSSO XO XI VDDO
NJU26107
13 12 11
31
30
29
10 32 9
1
2
3
4
5
6
7
SDO2
SDO1
SDO0
SEL1
Fig. 3 NJU26107 Pin Configuration
Pin Description
Table 1 Pin Description
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol SDO2 SDO1 SDO0 SEL1 *1 SCL/SCK SDA/SDOUT AD1/SDIN AD2/SSb VDDO XI XO VSSO RESETb VDDC VSSC WDC *2 I/O O O O I I I/O I I -I O -I --O Description Audio Data Output 2 L/R Audio Data Output 1 L/R HPF Audio Data Output 0 L/R LPF Select I2C or Serial bus I2C Clock / Serial Clock I2C I/O / Serial Output This pin requires a pull-up resistance. I2C Address / Serial Input I2C Address / Serial Enable OSC Power Supply +2.5V X'tal Clock Input OSC Output OSC GND RESET (active Low) Core Power Supply +2.5V Core GND Clock for Watch Dog Timer No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Symbol VDDC VSSC VDDR VSSR SDI0 SDI1 TEST LRI BCKI MCK BCKO LRO I/O Description Core Power Supply +2.5V Core GND I/O Power Supply +2.5V I/O GND Audio Data Input 0 L/R Audio Data Input 1 L/R Connect to GND LR Clock Input Bit Clock Input Master Clock Output Bit Clock Output LR Clock Output
SDA/SDOUT
AD1/SDIN
SCL/SCK
AD2/SSb
8
----I I I I I O O O
* I : Input, O : Output, I/O: Bi-directional *1 SEL1 : Input *2 WDC : Output
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NJU26107
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Digital Audio Interface
The NJU26107 audio interface provides industry standard serial data formats of I2S, MSB-first left-justified or MSB-first right-justified. The NJU26107 audio interface provides two data inputs, SDI0, SDI1 and three data outputs, SDO0, SDO1, SDO2 as shown in table 2, table 3 and Fig.2. An audio interface input and output data format become the same data format.
Table 2 Pin No. 25 26 Table 3 Pin No. 3 2 1
Serial Audio Input Pin Symbol Description SDI0 Audio Data Input 0 L / R SDI1 Audio Data Input 1 L / R
Serial Audio Output Pin Symbol Description SDO0 Audio Data Output 0 L / R LPF SDO1 Audio Data Output 1 L / R HPF SDO2 Audio Data Output 2 L / R
Host Interface
The NJU26107 can be controlled via Serial Host Interface (SHI) using either of two serial bus format : 4-Wire serial bus or I2C bus.(Table 4) Data transfers are in 8 bit packets (1 byte) when using either format. Serial Host Interface Pin Description.(Table 5) Table 4 Serial Host Interface Pin Description
Pin No. 4 Symbol SEL1 Setting "Low" "High" Host Interface I2C bus 4-Wire serial bus
Table 5 Serial Host Interface Pin Description Symbol 4-Wire Serial bus Format Pin No. I2C bus Format (I2C bus / Serial) 5 SCL / SCK Serial Clock Serial Clock Serial Data Input/Output Serial Data Output 6 SDA / SDOUT (Open Drain Input/Output) (CMOS) 2 7 AD1 / SDIN I C bus address Bit1 Serial Data Input Serial enable 8 AD2 / SSb I2C bus address Bit2 Note : SDA /SDOUT pin is a bi-directional open drain. SDA /SDOUT output is normal CMOS output in case of 4-Wire Serial bus mode and SSb="Low". SDA /SDOUT output is Hi-Z state in case of 4-Wire Serial bus mode and SSb="High". This pin requires a pull-up resister in both 4-Wire serial and I2C bus mode.
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NJU26107
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I C bus
2
When the NJU26107 is configured for I2C bus communication during the Reset initialization sequence. I2C bus interface transfers data to the SDA pin and clocks data to the SCL pin. AD1 and AD2 pins are used to configure the seven-bit SLAVE address of the serial host interface. (Table 6) This offers additional flexibility to a system design by four different SLAVE addresses of the NJU26107. An address can be arbitrarily set up by the AD1 and AD2 pins. The I2C address of AD1/AD2 is decided by connection of AD1/AD2 pins. Table 6 I2C bus SLAVE Address
AD2 AD1
bit7 0 0 0 0
bit6 0 0 0 0
bit5 1 1 1 1
bit4 1 1 1 1
bit3 1 1 1 1
bit2 0 0 1 1
bit1 0 1 0 1
R/W bit0 R/W
Start bit
Slave Address ( 7bit )
R/W bit
ACK
* SLAVE address is 0 when AD1/2 is "Low". SLAVE address is 1 when AD1/2 is "High". Note : In case of the NJU26107 only single-byte transmission is available. The serial host interface supports "Standard-Mode (100kbps)" I2C bus data transfer.
4-Wire Serial Interface
The serial host interface can be configured for 4-Wire Serial bus communication by setting SEL1 pin ="High" during the Reset initialization sequence. SHI bus communication is full-duplex; a write byte is shifted into the SDIN pin at the same time that a read byte is shifted out of the SDOUT pin. Data transfers are MSB first and are enabled by setting the Slave Select pin Low ( SSb=0 ). Data is clocked into SDIN on rising transitions of SCK. Data is latched at SDOUT on falling transitions of SCK except for the first byte (MSB) which is latched on the falling transitions of SSb. SDOUT is Hi-Z in case of SSb = "High". SDOUT is CMOS output in case of SSb = "Low". SDOUT needs a pull-up resistor when SDOUT is Hi-Z.
SSb SCK SDIN SDOUT Hi-Z bit7
MSB
bit6 bit6
bit5 bit5
bit1 bit1
bit0
LSB
bit7
bit0
unstable
Hi-Z
Fig. 4 4-Wire Serial Interface Timing Note: When the data-clock is less than 8 clocks, the input data is shifted to LSB side and is sent to the DSP core at the transition of SSb="High". When the data-clock is more than 8 clocks, the last 8 bit data becomes valid. After sending LSB data, SDOUT transmits the MSB data which is received via SDIN until SSb becomes "High". SDOUT is Hi-Z in case of SSb = "High". SDOUT is CMOS output in case of SSb = "Low". SDOUT needs a pull-up resistor to prevent SDOUT from becoming floating level.
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NJU26107
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WatchDog Clock
The NJU26107 outputs clock pulse through WDC (No.16) pin during normal operation. (Table 7) Table7 WatchDog Clock Output Cycle WDC Output Cycle (Low/High) Time 100ms The NJU26107 generates a clock pulse through the WDC terminal after resetting the NJU26107. The WDC clock is useful to check the status of the NJU26107 operation. For example, a microcomputer monitors the WDC clock and checks the status of the NJU26107. When the WDC clock pulse is lost or not normal clock cycle, the NJU26107 does not operate correctly. Then reset the NJU26107 and set up the NJU26107 again. Note: If input and output of a audio signal stop and an audio interface stops, WDC can't output. That is because it has controlled based on the signal of an audio interface.
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NJU26107
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NJU26107 Command Table
Table 8 NJU26107 Command No. Command
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 System State Firmware mode select SW select Fs Select / Input Select AGC Threshold Level AGC Noise Compressor Threshold Level AGC Attack Time / Release Time AGC Ratio AGC Output Trim AGC BYPASS Trim eala Surround Gain SRS 3D Stereo Center Gain SRS 3D Stereo Space Gain ealaBass LPF fo ealaBass LPF Gain ealaBass Treble fo ealaBass Treble Gain ealaBass Output Trim eala Bass Attack Time / Release Time SRS TruBass Speaker Size SRS TruBass Punch Control SRS TruBass Bass Control No. 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 BBE Contour BBE Process Tone Control Bass Gain Tone Control Treble Gain Master Volume Smooth Control Master Volume Setup Master Volume Balance LPF order mode LPF1 f0 LPF2 f0 HPF order mode HPF f0 L0/R0 Channel Trim L1/R1 Channel Trim L2/R2 Channel Trim Version No. Request Revision No. Request AGC Input Level Request AGC Gain Reduction Level Request Start Command No Operation Command
Notes : In respect to detail command information, request New Japan Radio Co., Ltd. and permission of a licenser (SRS Labs. Inc. and BBE Sound, Inc.) is required. .
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NJU26107
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License Information
1. The "SRS 3D", "TruBass" technology rights incorporated in the NJU26107 are owned by SRS Labs, a U.S. Corporation and licensed to New Japan Radio Co., Ltd.. Purchaser of NJU26107 must sign a license for use of the chip and display of the Labs trademarks. Any products incorporathing the NJU26107 must be send to SRS Labs for review. "SRS 3D", "TruBass" are protected under US and foreign patents issued and/or pending. "SRS 3D", "TruBass", SRS and symbol are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase of the NJU26107, nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology. SRS Labs requires all set marks to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual separately provided.
For further information, please contact:: SRS Labs, Inc. 2909 Daimler Street. Santa Ana, CA 92705 USA Tel: 949-442-1070 Fax: 949-852-1099
http://www.srslabs.com
2. The NJU26107 is manufactured by New Japan Radio Co.,Ltd. under license from BBE Sound Inc. BBE is a registered trademark of BBE Sound Inc. A license from BBE Sound Inc. must be required before the NJU26107 an be purchased from New Japan Radio Co.,Ltd.
BBE Sound, Inc. 5381 Production Drive Huntington Beach, CA 92649 USA Tel: 714-897-6766 Fax: 714-896-0736
http://www.bbesound.com
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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